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FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 1 september 2010 preliminary datasheet FDMS3604S dual n-channel powertrench ? mosfet n-channel: 30 v, 30 a, 6.8 m n-channel: 30 v, 40 a, 2.6 m features q1: n-channel ? max r ds(on) = 6.8 m at v gs = 10 v, i d = 13 a ? max r ds(on) = 9.8 m at v gs = 4.5 v, i d = 11 a q2: n-channel ? max r ds(on) = 2.6 m at v gs = 10 v, i d = 23 a ? max r ds(on) = 3. 5 m at v gs = 4.5 v, i d = 21 a ? low inductance packaging shortens ri se/fall times, resulting in lower switching losses ? mosfet integration enables optimum layout for lower circuit ind uctance and reduced switch node ringing ? rohs compliant general description this device includes two specia lized n-channel mosfets in a dual pqfn package. the switch node has been internally connected to enable easy placement and routing of synchronous buck converters. the contro l mosfet (q1) and synchronous syncfet (q2) have been designed to provide optimal power efficiency. applications ? computing ? communications ? general purpose point of load ? notebook vcore mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter q1 q2 units v ds drain to source voltage 30 30 v v gs gate to source voltage (note 3) 20 20 v i d drain current -continuous (package limited) t c = 25 c 30 40 a -continuous (silicon limited) t c = 25 c 60 130 -continuous t a = 25 c 13 1a 23 1b -pulsed 40 100 e as single pulse avalanche energy 40 4 112 5 mj p d power dissipation for single operation t a = 25 c 2.2 1a 2.5 1b w power dissipation for single operation t a = 25 c 1.0 1c 1.0 1d t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient 57 1a 50 1b c/w r ja thermal resistance, junction to ambient 125 1c 120 1d r jc thermal resistance, junction to case 3.5 2 device marking device package reel size tape width quantity 22ca n7cc FDMS3604S power 56 13 ? 12 mm 3000 units 4 3 2 1 5 6 7 8 q 1 q 2 power 56 g1 d1 d1 d1 g2 s2 s2 s2 d1 phase (s1/d2) s2 s2 s2 g2 d1 d1 d1 g1 top bottom phase
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 2 preliminary datasheet electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics symbol parameter test conditions type min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v i d = 1 ma, v gs = 0 v q1 q2 30 30 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c i d = 10 ma, referenced to 25 c q1 q2 15 12 mv/c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v q1 q2 1 500 a a i gss gate to source leakage current, forwad v gs = 20 v, v ds = 0 v q1 q2 100 100 na na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a v gs = v ds , i d = 1 ma q1 q2 1.1 1.1 2 1.8 2.7 3 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c i d = 10 ma, referenced to 25 c q1 q2 -6 -5 mv/c r ds(on) drain to source on resistance v gs = 10 v, i d = 13 a v gs = 4.5 v, i d = 11 a v gs = 10 v, i d = 13 a , t j = 125 c q1 5.2 7.5 6.2 6.8 9.8 9.2 m v gs = 10 v, i d = 23 a v gs = 4.5 v, i d = 21 a v gs = 10 v, i d = 23 a , t j = 125 c q2 2 2.6 2.6 2.6 3. 5 4 g fs forward transconductance v ds = 5 v, i d = 13 a v ds = 5 v, i d = 23 a q1 q2 61 130 s c iss input capacitance q1: v ds = 15 v, v gs = 0 v, f = 1 mhz q2: v ds = 15 v, v gs = 0 v, f = 1 mhz q1 q2 1340 3240 1785 4310 pf c oss output capacitance q1 q2 485 1230 645 1635 pf c rss reverse transfer capacitance q1 q2 53 103 80 155 pf r g gate resistance q1 q2 0.2 0.2 0.6 0.8 2.0 3.0 t d(on) turn-on delay time q1: v dd = 15 v, i d = 13 a, r gen = 6 q2: v dd = 15 v, i d = 23 a, r gen = 6 q1 q2 8.2 13 16 23 ns t r rise time q1 q2 2.5 4.8 10 10 ns t d(off) turn-off delay time q1 q2 20 31 32 50 ns t f fall time q1 q2 2.2 3.4 10 10 ns q g total gate charge v gs = 0 v to 10 v q1 v dd = 15 v, i d = 13 a q2 v dd = 15 v, i d = 23 a q1 q2 21 47 29 66 nc q g total gate charge v gs = 0 v to 4.5 v q1 q2 10 22 14 31 nc q gs gate to source gate charge q1 q2 3.9 9 nc q gd gate to drain ?miller? charge q1 q2 3.1 5.5 nc
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 3 preliminary datasheet electrical characteristics t j = 25 c unless otherwise noted drain-source diod e characteristics symbol parameter test conditions type min typ max units v sd source to drain diode forward voltage v gs = 0 v, i s = 13 a (note 2) v gs = 0 v, i s = 23a (note 2) q1 q2 0.8 0.8 1.2 1.2 v t rr reverse recovery time q1 i f = 13 a, di/dt = 100 a/ p s q2 i f = 23 a, di/dt = 300 a/ p s q1 q2 25 32 40 51 ns q rr reverse recovery charge q1 q2 9 39 18 62 nc notes: 1: r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2: pulse test: pulse width < 300 p s, duty cycle < 2.0%. 3: as an n-ch device, the negative vgs rating is for low duty cycle pulse ocurrence only. no co ntinuous rating is implied. 4: e as of 40 mj is based on starting t j = 25 o c; n-ch: l = 1 mh, i as = 9 a, v dd = 27 v, v gs = 10 v. 100% test at l= 0.3 mh, i as = 14 a. 5: e as of 112 mj is based on starting t j = 25 o c; n-ch: l = 1 mh, i as = 15 a, v dd = 27 v, v gs = 10 v. 100% test at l= 0.3 mh, i as = 22 a. a. 57 c/w when mounted on a 1 in 2 pad of 2 oz copper c. 125 c/w when mounted on a minimum pad of 2 oz copper b. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper d. 120 c/w when mounted on a minimum pad of 2 oz copper
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 4 preliminary datasheet typical characteristics (q1 n-channel) t j = 25 c unless otherwise noted figure 1. 0.0 0.2 0.4 0.6 0.8 1.0 0 10 20 30 40 v gs = 4.5 v v gs = 3.5 v v gs = 6 v v gs = 4 v pulse duration = 80 s duty cycle = 0.5% max v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics f i g u r e 2 . 0 10203040 0 1 2 3 4 v gs = 6 v v gs = 3.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 13 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 4 8 12 16 20 t j = 125 o c i d = 13 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.5 2.0 2.5 3.0 3.5 4.0 0 10 20 30 40 t j = 150 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 40 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 5 preliminary datasheet figure 7. 0 5 10 15 20 25 0 2 4 6 8 10 i d = 13 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 30 10 100 1000 2000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1 10 20 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 20 40 60 80 100 limited by package v gs = 4.5 v r jc = 3.5 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) maximum continuous drain current vs case temperature fi g ure 11 . fo rw ard bi as safe op erating area f i g u r e 1 2 . s i n g l e p u l s e m a x i m u m power dissipa tion typical characteristics (q1 n-channel) t j = 25 c unless otherwise noted 0.01 0.1 1 10 100 0.01 0.1 1 10 100 dc 100 ms 10 ms 1 ms 1s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds ( on ) single pulse t j = max rated r ja = 125 o c/w t a = 25 o c 10s 100us 200 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.1 1 10 100 1000 single pulse r ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec)
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 6 preliminary datasheet figure 13. junction -to-ambient transient thermal response curve 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r ja = 125 o c/w ( note 1c ) duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a typical characteristics (q1 n-channel) t j = 25 c unless otherwise noted
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 7 preliminary datasheet typical characteristics (q2 n-channel) t j = 25 o c unlenss otherwise noted 0.00.20.40.60.81.0 0 20 40 60 80 100 v gs = 4.5 v v gs = 3 v v gs = 3.5 v v gs = 4 v pulse duration = 80 s duty cycle = 0.5% max v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) figure 14. on-regio n characteristics 020406080100 0 2 4 6 8 v gs = 3 v v gs = 3.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 10 v figure 15. normalized on-resist ance vs drain current and gate voltage figure 16. normalized on-resistance vs junction temperature -75 -50 -25 0 25 50 75 100 125 150 0.8 1.0 1.2 1.4 1.6 i d = 23 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) 24681 0 0 3 6 9 12 t j = 125 o c i d = 23 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max figure 17. on-resistance vs gate to source voltage figure 18. transfer characteristics 1.52.02.53.03.54.0 0 20 40 60 80 100 t j = 125 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 19. source to drain diode forward voltage vs source current 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v)
typical characteristics (q2 n-channel) t j = 25 o c unless otherwise noted figure 20. gate charge characteristics 0 1020304050 0 2 4 6 8 10 i d = 23 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v 0.1 1 10 30 10 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss figure 21. capacitance vs drain to source voltage figure 22. unclamped inductive swit ching capability 0.01 0.1 1 10 100 1000 1 10 50 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) 25 50 75 100 125 150 0 40 80 120 160 r jc = 2 o c/w v gs = 4.5 v limited by package v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) figure 23. maximun continuous drain current vs case temperature f i g u r e 2 4 . f o r w a r d b i a s s a f e oper ating area figure 25. single pulse maximum power di ssipation FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 8 preliminary datasheet 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 200 dc 100 ms 10 ms 1 ms 1s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds ( on ) single pulse t j = max rated r ja = 120 o c/w t a = 25 o c 10s 10 -3 10 -2 10 -1 110 100 1000 0.1 1 10 100 1000 single pulse r ja = 120 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec)
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 9 preliminary datasheet typical characteristics (q2 n-channel) figure 26. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 110 100 1000 0.001 0.01 0.1 1 2 single pulse r t ja = 120 o c/w (note 1d) duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 10 preliminary datasheet syncfet schottky body diode characteristics fairchild?s syncfet process emb eds a schottky diode in parallel with powertrench mosfet. th is diode exhibits similar characteristics to a discrete exte rnal schottky diode in parallel with a mosfet. figure 27 shows the reverse recovery characteristic of the FDMS3604S. schottky barrier diodes exhibit significant leakage at high tem- perature and high reverse voltage. this will increase the power in the device. 0 50 100 150 200 -5 0 5 10 15 20 25 didt = 300 a/ p s current (a) time (ns) typical char acteristics (continued) figure 27. FDMS3604S syncfet body diode reverse recovery characteristic figure 28. syncfet body diode reverse leakage versus drain-source voltage 0 5 10 15 20 25 30 10 -6 10 -5 10 -4 10 -3 10 -2 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (a) v ds , reverse voltage (v)
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 11 preliminary datasheet dimensional outlin e and pad layout
FDMS3604S dual n-channel powertrench ? mosfet ?2010 fairchild semiconductor corporation FDMS3604S rev.b4 www.fairchildsemi.com 12 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fa irchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform w hen properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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